Course Name: Hardware modeling using verilog

Course abstract

The course will introduce the participants to the Verilog hardware description language. It will help them to learn various digital circuit modeling issues using Verilog, writing test benches, and some case studies.


Course Instructor

Media Object

Prof. Indranil Sengupta

Indranil Sengupta has obtained his B.Tech., M.Tech. and Ph.D. degrees in Computer Science and Engineering from the University of Calcutta. He joined the Indian Institute of Technology, Kharagpur, as a faculty member in 1988, in the Department of Computer Science and Engineering, where he is presently a full Professor. He had been the former Heads of the Department of Computer Science and Engineering and also the School of Information Technology of the Institute. He has over 28 years of teaching and research experience. He has guided 22 PhD students, and has more than 200 publications to his credit in international journals and conferences. His research interests include cryptography and network security, VLSI design and testing, and mobile computing.
More info

Teaching Assistant(s)

No teaching assistant data available for this course yet
 Course Duration : Jul-Sep 2021
  View Course
 Syllabus
 Enrollment : 20-May-2021 to 02-Aug-2021
 Exam registration : 17-Jun-2021 to 20-Aug-2021
 Exam Date : 26-Sep-2021

Enrolled

2971

Registered

308

Certificate Eligible

148

Certified Category Count

Gold

4

Silver

34

Elite

63

Successfully completed

47

Participation

75

Success

Elite

Silver

Gold




Legend

AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75 AND FINAL SCORE >=40
BASED ON THE FINAL SCORE, Certificate criteria will be as below:
>=90 - Elite + Gold
75-89 -Elite + Silver
>=60 - Elite
40-59 - Successfully Completed

Final Score Calculation Logic

  • Assignment Score = Average of best 6 out of 8 assignments.
  • Final Score(Score on Certificate)= 75% of Exam Score + 25% of Assignment Score
    Note:We have taken best assignment score from both July 2020 and July 2021 course
Hardware modeling using verilog - Toppers list
Top 1 % of Certified Candidates

ADHITYA G 92%

COLLEGE OF ENGINEERING GUINDY


Top 2 % of Certified Candidates

SONALIKA BHANDARI 91%

DELHI TECHNOLOGICAL UNIVERSITY

SHREYA N S 90%

University Visvesvaraya College of Engineering

CHINTAPALLI HEMA DURGA 90%

Qualcomm India Private Limited


Top 5 % of Certified Candidates

PRANAAV JOTHI M 88%

MADRAS INSTITUTE OF TECHNOLOGY

VIKRAM KOTI MOURYA VANGARA 87%

CENTRAL UNIVERSITY OF KARNATAKA

SHUBHAM PUROHIT 87%

INDIAN INSTITUTE OF TECHNOLOGY,KANPUR

Enrollment Statistics

Total Enrollment: 2971

Registration Statistics

Total Registration : 308

Assignment Statistics



Assignment

Exam score

Final score

Score Distribution Graph - Legend

Assignment Score: Distribution of average scores garnered by students per assignment.
Exam Score : Distribution of the final exam score of students.
Final Score : Distribution of the combined score of assignments and final exam, based on the score logic.

Course definitely laid a foundation stone to the world of digital VLSI hardware design


This course increases my understanding level in HDL, and also the the course instructor Prof. Indranil Sengupta, is a very good teacher, his teaching level is mind blowing.!!!! So thanks to Prof. & also thanks to NPTEL.